Do not clobber AMD TSC offset on real-mode switch.

Signed-off-by: David Lively <dlively@virtualiron.com>
Signed-off-by: Ben Guthro <bguthro@virtualiron.com>

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 2b75b1fd45470d49240f5408130e40efedb2319f..d1fca8d1dcb94f000cb7f4d7ef91e9b1854f2cfa 100644 (file)
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -2328,9 +2328,6 @@ static int svm_reset_to_realmode(struct vcpu *v,
     /* clear the vmcb and user regs */
     memset(regs, 0, sizeof(struct cpu_user_regs));
    
-    /* VMCB Control */
-    vmcb->tsc_offset = 0;
-
     /* VMCB State */
     vmcb->cr0 = X86_CR0_ET | X86_CR0_PG | X86_CR0_WP;
     v->arch.hvm_svm.cpu_shadow_cr0 = X86_CR0_ET;